Recently, many different kinds of semiconductor memory devices, have been developed and in all of these memory devices, sense amplifiers for amplifying the data stored in the memory cells are used. However, as the density of the semiconductor memory device increases the peak current of the sense amplifier driving signals also increases to a high level, and the stability of the sense amplifier deteriorates during the driving of the sense amplifier. Therefore, efforts have been made in order to reduce the peak current of the sense amplifier driving signals, to reduce the noise caused thereby, and to increase the stability of the sense amplifier.
FIG. 1A (Prior Art) illustrates the conventional sense amplifier and a driving circuit therefore, both of which are used generally. As shown, this conventional sense amplifier comprises two P-MOS transistors connected to a latch node LA.sub.P, two N-MOS transistors connected to a latch node LA.sub.N, and bit lines BL.sub.L, BL.sub.R connected to the gate terminals of the MOS transistors.
The sense amplifier driving circuit includes a large sized P-MOS transistor Q1 and a large sized N-MOS transistor Q2 for driving the sense amplifiers. Both MOS transistors are respectively connected to the latch nodes LA.sub.P, LA.sub.N, and also respectively connected to an external voltage Vcc terminal and to a ground potential Vss terminal. The sense driving circuit also includes inverters INV1, INV2 respectively connected to the gate terminals of the MOS transistors Q1, Q2.
The operation of conventional sense amplifier driving circuit as described above will now be explained with references to FIG. 2. During the active restore operations of the sense amplifier, if a row address strobe signal RAS goes low, then an active restore enable signal .phi..sub.SP becomes high. This signal is inverted to a low level by the inverter INV1, and the inverted signal is inputed to the gate terminal of the driving transistor Q1 to turn on the transistor Q1.
In a similar way, during the sensing operation of the N-MOS sense amplifier, if the row address strobe signal RAS goes to a low level, then a sensing enable signal .phi..sub.SN becomes low. This signal is inverted to a high level by the inverter INV2, and the inverted signal is inputted into the gate terminal of the transistor Q2 to turn on the transistor Q2.
Thus, the conventional sense amplifiers are controlled by the turning-on/off operations of the driving MOS transistors Q1, Q2.
However, when the driving MOS transistors Q1 and Q2 are turned on, peak currents Iccp and Issp are generated and suddenly increased, thereby producing the large power noises. Further, the potentials of the common latch nodes LA.sub.P, LA.sub.N for the sense amplifiers varies in a steep form as shown by the wave forms of the driving signals .phi.LA.sub.P, .phi.LA.sub.N in FIG. 2 (Prior Art), and therefore, the stability of the micro-sized sense amplifiers deteriorates further.
In order to improve the stability of the sense amplifier, the conventional sense amplifier driving circuit can be constructed such that dual sensing strobe signals are inputted through sequential operations of two or more transistors. However, in such cases a large number of involved transistors make the controlling very complicated and difficult.
In order to overcome the above described disadvantages, the MOS transistors Q1, Q2 for driving the sense amplifiers SA.sub.1 -SA.sub.N can be divided into smaller transistors. These divided MOS transistors can then be connected to the respective sense amplifiers, as illustrated in FIG. 1B (Prior Art).
However, this causes, the parasitic capacitance of the nodes LA.sub.P, LA.sub.N to be increased due to a large number of sense amplifiers, and consequently, the sensing speed is slowed down. Furthermore the lay-out of the circuitry and the forming of the dual sensing slopes become difficult. The sense amplifier driving circuit illustrated in FIG. 1B is similar to that of FIG. 1A, except that a plurality of driving transistors Q1.sub.1 -Q1n Q2.sub.1 -Q2n are respectively connected to the sense amplifiers SA.sub.1 -SA.sub.N. That is, the sense amplifier driving P-MOS transistors Q1.sub.1 -Q1n and the sense amplifier driving N-MOS transistors Q2.sub.1 -Q2n which are disposed in a distributed manner are connected between the common latch nodes LA.sub.P, LA.sub.N and the terminals Vcc, Vss respectively.
Upon the driving operations of the sense amplifiers, if the row address strobe signal RAS of FIG. 2 (Prior Art) goes to a low level, the P-MOS transistors Q1.sub.1 -Q1n and the N-MOS transistors Q2.sub.1 -Q2n are turned on/off by the active restore enable signals .phi..sub.SP and the sensing enable signals .phi..sub.SN.sbsb.1 which have been inverted by the inverters INV1 and INV2.
Upon driving the sense amplifiers, the transistors Q1.sub.1 -Q1n or Q2.sub.1 -Q2n are simultaneously turned-on so as to produce suddenly increasing peak currents, and therefore, the potentials of the latch nodes LA.sub.P, LA.sub.N are suddenly varied, decreasing the stability of the micro-sized sense amplifiers.
Further, since the sense amplifier driving transistors are disposed in a distributed manner within the memory cell array, it is difficult for this system to adopt the sensing scheme with the driving signal having the dual slope, due to a difficulty of the lay-out of circuitry and an increase of chip area. As shown by the timing diagram (FIG. 2 (Prior Art)) for the conventional sense amplifier driving circuit, the peak values of driving signal currents Icc and Iss are very large, and the voltage variations of the driving signals .phi.LA.sub.P and .phi.LA.sub.N are very steep.
As described above, the conventional sense amplifier driving circuit has disadvantages such that, during the driving operation of the sense amplifiers, and particularly, upon the turning-on of the driving transistors, the peak current values of the driving signals .phi.LA.sub.P and .phi.LA.sub.N become very large, the variations of the driving voltages become very rapid, and the sensing speed thereof becomes very slow due to the increase of the parasitic capacitance, for such amplifiers the lay-out of the circuitry becomes difficult, and the formation of the dual sensing slope becomes also difficult.